|
2026-09-08
|
MTU 9000 moves the fabric roofline to 24.5 GB/s one-way, 48.9 duplex
|
accepted
|
experiment, fabric, hardware
|
|
2026-09-08
|
A reduction barrier makes Qwen GDN graph replay bit exact
|
accepted
|
incident, kernels, attention, numerics
|
|
2026-09-08
|
Moving the KDA state tile out of shared memory is 4.6x at M=8
|
accepted
|
experiment, kernels, attention, memory
|
|
2026-09-08
|
Radix-paged KV holds 93 streams at 262k where 8 fit unshared
|
accepted
|
experiment, cache, memory, attention
|
|
2026-09-08
|
Qwen3.8 linear-attention FP8 passes 12 of 12 quality cases
|
accepted
|
experiment, numerics, attention, telemetry, baseline
|
|
2026-09-08
|
Qwen3.8 base linear attention passes all 12 quality cases in NVFP4
|
accepted
|
experiment, numerics, attention, telemetry, baseline
|
|
2026-09-08
|
Qwen3.8 base full attention passes all 12 quality cases in NVFP4
|
accepted
|
experiment, numerics, attention, memory, telemetry, baseline
|
|
2026-09-08
|
Qwen3.8 base routers and PLE pass all 12 quality cases in NVFP4
|
accepted
|
experiment, numerics, moe, attention, memory, telemetry, baseline
|
|
2026-09-08
|
Whole-family linear-attention NVFP4 reaches 102.76 tok/s at c16
|
accepted
|
experiment, baseline, numerics, attention, runtime
|
|
2026-09-08
|
Head’s 2.3x slowdown is a 728 MHz GPU clock ceiling, not kswapd
|
accepted
|
experiment, hardware, memory, baseline
|
|
2026-09-08
|
Display-power renegotiation does not lift the head’s 728 MHz cap
|
rejected
|
incident, hardware, baseline
|
|
2026-09-08
|
A cold power cycle lifts the head from 728 MHz to 2418 MHz
|
accepted
|
experiment, hardware, baseline
|
|
2026-09-08
|
Removing display power restores the head’s normal GPU clock range
|
open
|
incident, hardware, baseline
|
|
2026-09-08
|
K1 wins the matched Qwen3.8 K1 to K7 general-engine sweep
|
rejected
|
experiment, runtime, scheduler, hardware, baseline
|
|
2026-09-08
|
Local EXT4 puts Qwen3.8 first token at 468.83 seconds
|
accepted
|
experiment, runtime, memory, hardware, baseline
|
|
2026-09-08
|
Static MTP1 wins the Qwen3.8 general-engine depth sweep
|
rejected
|
experiment, runtime, baseline, hardware
|
|
2026-09-08
|
The 728 MHz power state inflated Qwen3.8 loading by 5.1x
|
accepted
|
experiment, runtime, hardware, baseline
|
|
2026-09-07
|
Rank-local E256 MoE misses the Qwen K1 and K4 step budgets
|
rejected
|
experiment, moe, kernels, numerics, telemetry
|
|
2026-09-07
|
The expert split decodes the same tokens; the fabric is idle on one rank and the wall on the other
|
accepted
|
experiment, fabric, moe, runtime, numerics
|
|
2026-09-07
|
The pair is 6.1x one booster, not 2.9x behind it, and the expert cache is most of the ladder
|
accepted
|
experiment, fabric, cache, memory, moe, runtime, baseline
|
|
2026-09-07
|
Exact-N640 retained tail wins only at Qwen c4
|
accepted
|
experiment, kernels, numerics, telemetry
|
|
2026-09-07
|
A TP2 vocab GEMV cuts Qwen3.8 M1 head latency by 31%
|
accepted
|
experiment, kernels, numerics, telemetry
|
|
2026-09-07
|
Exact-N640 dynamic MoE cuts Qwen c16 latency by 17.7%
|
accepted
|
experiment, kernels, numerics, telemetry
|
|
2026-09-07
|
The Qwen controller publishes one authenticated TP2 boundary
|
accepted
|
experiment, cache, runtime
|
|
2026-09-07
|
Layer 3 completes the exact Qwen attention state transition
|
accepted
|
experiment, attention, runtime, kernels, fabric, telemetry
|
|
2026-09-07
|
Qwen3.8 linear-attention NVFP4 removes 2.791 GiB per c16 step
|
accepted
|
experiment, numerics, attention, telemetry, tooling
|
|
2026-09-07
|
Unmodified Qwen3.8 passes the 12-case quantization gate
|
accepted
|
experiment, numerics, baseline
|
|
2026-09-07
|
The fully touched Qwen3.8 c16 state allocation fits beside the 62.46 GiB model
|
accepted
|
experiment, memory, cache, attention
|
|
2026-09-07
|
The Qwen3.8 state plan counts 2,088,755,200 CUDA bytes per rank-stream
|
accepted
|
research, memory, cache, attention
|
|
2026-09-07
|
Qwen3.8 reaches 163.40 tok/s at c16 without speculation on 64 KiB pages
|
accepted
|
experiment, baseline, runtime
|
|
2026-09-07
|
One-tensor staging loads Qwen3.8 on 64 KiB pages
|
accepted
|
experiment, runtime, memory
|
|
2026-09-07
|
One booster decodes GLM-5.3-Flash end to end, and a token reads 21.05 GiB, not the recorded 9.6
|
accepted
|
experiment, runtime, moe, memory, attention, numerics, baseline
|
|
2026-09-07
|
The CUTLASS grouped GEMM beats the scalar GEMV loop at every M, M=1 included, so the crossover is 1
|
accepted
|
experiment, runtime, moe, kernels, numerics
|
|
2026-09-07
|
Tensor dispatch and duplicate passes dominate Qwen3.8 startup
|
accepted
|
experiment, runtime, memory
|
|
2026-09-06
|
Two idle NIC ports held 444 MiB; unbinding them costs nothing
|
accepted
|
experiment, fabric, memory, hardware
|
|
2026-09-06
|
Deleting the key transpose puts the DSA indexer scan on its streaming floor
|
accepted
|
kernels, experiment, attention, memory
|
|
2026-09-06
|
Fusing the MoE layer’s two grouped GEMMs is worth 4%, and a CUDA graph already collects it
|
rejected
|
experiment, kernels, moe, memory, numerics
|
|
2026-09-06
|
CUTLASS NVFP4 grouped GEMM runs on sm_121 unpatched and holds 80% of roofline at MoE decode shapes
|
rejected
|
experiment, kernels, numerics, baseline
|
|
2026-09-06
|
The indexer caches per-token gates too: 7 unshared 262k streams per booster
|
accepted
|
research, cache, attention, memory
|
|
2026-09-06
|
At the 262k cap the DSA indexer costs 12x the sparse MLA it selects for
|
accepted
|
experiment, attention, kernels, cache
|
|
2026-09-06
|
Real NVFP4 scales need the sm_100 swizzle, and a booster loads in 14 s
|
accepted
|
experiment, numerics, memory, kernels
|
|
2026-09-06
|
vLLM reaches 207 tok/s at c8, while the c16 weight roofline is 282 tok/s
|
accepted
|
experiment, baseline, memory, numerics
|
|
2026-09-06
|
The idle GPU driver holds 0.7 GiB; the 64K slab tax holds 1.4
|
accepted
|
experiment, hardware, memory
|
|
2026-09-06
|
A GB10 node reads at 238 GB/s and the pair’s fabric moves 23 GB/s
|
accepted
|
experiment, hardware, memory, fabric
|
|
2026-09-06
|
3.5 GiB per node is firmware-owned; asking NVIDIA for a headless option
|
open
|
research, hardware, memory
|
|
2026-09-06
|
Stripping the OS returns 217 MiB; the rest is carveout and driver floor
|
rejected
|
experiment, hardware, memory
|
|
2026-09-06
|
The 98 GiB CUDA ceiling was page cache, not a limit
|
accepted
|
experiment, hardware, memory, runtime
|
|
2026-09-06
|
Dropping random kmalloc caches returns 0.9 GiB; mlx5 owns more than the GPU driver
|
accepted
|
experiment, hardware, memory
|
|
2026-09-05
|
gh and quarto install clean on arm64
|
accepted
|
infrastructure, tooling
|
|
2026-09-05
|
Specializing to one fuel and one GPU is worth 1.2x to 1.5x at batch 1
|
accepted
|
research, kernels, runtime
|
|
2026-09-05
|
cudaHostRegister needs serialization and row-aligned chunks
|
accepted
|
research, memory, hardware
|
|
2026-09-05
|
General engines reach 132.8 tok/s at c32 on this pair
|
accepted
|
baseline, runtime
|
|
2026-09-05
|
Both sparks are identical: GB10 sm_121, 64 KiB pages, 123.73 GiB
|
accepted
|
experiment, hardware, fabric
|
|
2026-09-05
|
64 KiB pages return 2.10 GiB per node
|
accepted
|
experiment, hardware, memory
|
|
2026-09-05
|
Three GB10 limits that decide how kernels get written
|
accepted
|
research, hardware, kernels
|
|
2026-09-05
|
TensorRT-LLM is not the runtime for rocket
|
rejected
|
research, runtime, kernels
|
|
2026-09-05
|
TensorRT-LLM: rejected as a runtime, not as a kernel source
|
rejected
|
research, runtime, kernels
|